LEARN ABOUT WORST CASE CIRCUIT ANALYSIS

UPDATED! Why Perform a WCCA?
This short white paper explores the Who, What, Where, When and Why of WCCA.

NEW! How WCCA Saves Money: The Case for Worst Case
Learn about the different ways in which worst case analysis saves money, board spins, and schedule and supports continuous process improvement.

NEW! Introduction to Worst Case Circuit Analysis
Learn about skills and resources you need in order to be able to perform a worst case circuit analysis (WCCA) with this introductory presentation including detailed notes.

Taken from various lectures and AEi Systems' own WCCA Training Workshop this PowerPoint Notes presentation discusses What WCCA is, Why and When to perform this critical analysis, Who should perform it, and What aspects drive the cost and schedule. Common issues found in WCCA are summarized and recommendations are made on how to improve the efficiency of the analysis effort. Finally, the new Aerospace TOR on WCCA is discussed by one of its authors, Charles Hymowitz (SME), along with its ramifications and future challenges.

Lessons Learned from WCCA
We know that “Worst Case Happens Everyday” and we review a lot of WCCA performed by other companies. The quality of that work, as well as a desire to see the level of analysis improved, motivated us to write this paper. This presentation looks at two aspects; Lessons Learned from HOW we do WCCA and Lessons Learned from actually DOING WCCA.

Tailoring TOR for Class D, Commercial Space, and Cubesat Missions
Presentation given by Charles Hymowitz at the NASA NEPP Workshop on 9.11.14. Discusses the reasons for performing Worst Case Analysis, the issues the Testing as a substitute for WCCA and the application of TOR-2012(8960)-4, REV. A Electrical Design Worst-Case Circuit Analysis: Guidelines and Draft Standard principles to lower class and tech demo/cubesat missions.


Why Regulators Need Modeling, Testing, and Analysis
The stability of regulator control loops and their noise performance are key factors in achieving a high level of power integrity for downstream circuits. Designers often take their simplicity, as a sign of robustness. By way of several examples, this presentation discusses the complex behavior that is revealed upon deeper investigation in to the control loop response. Load current and ESR variations and their impact on output impedance, stability and step load performance and SPICE modeling are discussed.

NEW! Migrating SI to GaN
GaN is being promoted as the next generation silicon that wins in every metric including, size, weight, cost and efficiency. There seems to be a lot of confusion about what it means to migrate from Si to GaN. It isn’t as simple as just swapping out the Si MOSFETs for GaN MOSFETs, though it is simpler to migrate linear regulators to switching regulators. Not every topology is GaN friendly and not every topology will see a performance increase. This paper will introduce the migration of linear and switching regulators, from Si to GaN, along with some of the challenges and trade-offs encountered along the way.

Design a VRM with Perfectly Flat Output Impedance in 5 Seconds or Less
Any discussion of power integrity includes a great deal of emphasis on the concept of target impedance and flat impedance requirements. But how do we design a voltage regulator module (VRM) specifically for flat impedance? This article will address not only that specific question, but how to accomplish it in 5 seconds or less.

The inductive nature of voltage-control loops
What is effective inductance of a voltage reference, voltage regulator, or op-amp and why is it important. "Is there really an inductor in there?", "Where does this inductance come from?", and "Why is the inductance so load current dependent?" All of these questions are answered.

Improving Logic Timing with Worst-Case Analysis
Digital worst case timing analysis (WCTA) analyzes the timing of digital devices under worst case end-of-life conditions including initial, temperature, aging and radiation tolerances. In this article the results of worst case timing analysis are applied in order to improve the worst case performance of the design.

Improving Circuit Designs with Logic Compatibility Analysis
WC Logic Compatibility analysis computes the worst case DC interface compatibility for all digital interfaces. The goal is to demonstrate positive margins for the required input voltages, positive margins for the worst case load currents seen by the drivers, and margins for the recommended fan-out . In this article, the results of a design analyzed using AEi Systems’ automated Logic Command software are presented.

How do I pick the best voltage regulator for my circuit?
There are so many different voltage regulators on the market these days.

Clock Power Optimization Depends On Jitter Control
Clock-jitter performance has become a top priority among clock, analog-to-digital controller (ADC), and power-supply manufacturers. Why? Simply, it interferes with the performance of digital circuits, particularly high-speed ADCs.

Optimize Wireless Power Transfer Link Efficiency
In attempting to improve the efficiency of wireless power transfer it is essential to consider the losses associated with the proximity effects of the transmit and receive coils.

Simple Method to Determine ESR Requirement
A single, simple measurement is described that allows the determination of the ESR required to achieve a desired phase margin, using a particular value of output capacitor. Solving the ESR requirement at the lowest operating current provides a stable solution for higher operating currents as well.

Component Aging in Power Converters
Extreme environments such as oil drilling, deep sea exploration, and space applications present daunting power supply design challenges. Power converters used in these applications, especially in "down-hole" drilling, may be subject to temperatures in excess of 200°C, while also facing extreme pressure.

Critical Conduction and Boost Mode Power Factor Corrector
This article discusses two of the many transient IC models in the new Power IC Model Library for PSpice: the MC33262 active power factor controller from ON Semiconductor and the UC3854 high power factor preregulator from Texas Instruments.

Unpredictable Aging Can Send Resistor Accuracy Way Off Course
High-reliability thick-film and thin-film resistors such as those qualified to MIL-PRF-55342 promise good performance for space applications at prices that are considerably lower than other resistor technologies like bulk foil.

NEW! Designing Power for Sensitive Circuits
The current focus on power integrity is related to maintaining a low and flat impedance at high-speed devices such as memory devices, FPGAs, CPUs, and SerDes transceivers. The singular goal is to ensure a stable supply voltage, within the specified range, to these high-speed devices as their load currents are dynamically changing. This article discusses Sensitivity to Power Supply Noise, Defining Sensitivity, Defining Power Supply Noise Limits, Designing a Power Supply Noise Filter and High-Accuracy Low-Noise Regulators.

Generating Stable Voltages For Multiple Applications
Understanding the key parameters of diodes and other components used in reference voltage circuits can help avoid issues in different application circuits across many disciplines.

Simulating RF Tuned Stages
The ADS suite of CAE software can be used to perform simulations on RF and microwave circuits with results that include the effects of component tuning. Assessing post-production- tuning (PPT) elements should be part of any RF worst case circuit analysis (WCCA).

Study of Aging Tolerance for Thin Film & Thick Film Resistors
This paper covers the computation of resistor aging using Arrhenius models.

So What Is Capacitor Corona?
How Capacitor Corona can bring down your system.

Quantifying Harmonic Distortion
A detailed analysis of the total harmonic distortion for a non-isolated boost topology with average current-mode control using the UC1854A and the UCC3817.

Simulating Adaptive On-Time Switching Regulators...
The advantages of constant on-time control in switching regulators are well understood. However, a principal drawback is that the switching frequency can vary with input and output voltages and the load making the EMI signature less than deterministic.

UC1846 Gate Drive Circuit and Voltage Doublers
This application note discusses the Texas Instruments UC1846 Current Mode PWM Controller, MOSFET gate drive circuit simulations, and voltage doubling circuits. A full transient model for the UC1846 is simulated.

No-Load Specification Impacts Power-Supply Performance
When reviewing power-supply specification requirements and supporting design proposals, we often see the minimum load identified as 0A loading. Although not an issue in and of itself, this no-load requirement significantly degrades the power supply's performance.

Gate Drive May Be the Culprit When "Q" is Low
The process of correlating SPICE models to bench data often leads to discoveries of second-order and sometimes third-order parasitic elements that significantly impact circuit performance. A couple of these side effects — a reduced circuit "Q" and a circuit Q that is dependent on an IC's input power-supply voltage and output circuit loading — seem to be relatively common, or at least prevalent in several recently modeled ICs.

Capacitor Values Don't Believe the Label
Variations in capacitor characteristics due to DC bias and other effects impact power-supply design and simulation, and their impact becomes greater as designers pursue higher performance and higher reliability.

Gain Equalization Improves Flyback Performance
In a discontinuous flyback converter, the gain of the output current is a function of the control voltage. A constant gain can be provided by compensating circuitry, which improves control-loop stability.

Optimizing Single-Stage Power Factor Correction
A comparison of four distinct PFC topologies reveals their inherent design tradeoffs. Based on these comparisons, a two-phase voltage mode Flyback converter is simulated in PSpice and prototyped.

SPICE uncovers regulator-stability problems
An adjustable linear regulator, the LM317 is one of those products that seems to have been around forever. Most people assume the device works just fine, but they've got problems they weren't even aware of. In particular, its stability isn't rock solid.

Analyze regulator stability
This article continues the LM317 discussion by examining how to simulate, predict and optimize stability.

LM317 Three Terminal Regulators Still Misunderstood
Technology in power electronics continues to move forward at a rapid pace. Monolithic switching regulators now offer switching frequencies above 2 MHz, synchronous rectification available on a chip, high quality switched cap regulators and multiphase controllers at our disposal. So why is it that we still seem to misunderstand the application of simple three terminal regulators?

Back to the Future with Magnetic Modulation
More than two decades ago, I was responsible for developing the two ac-dc power supplies that would ultimately be used in the AN/ALQ-184 Radar Jammer Pod aboard the F-16 fighter plane. Though the application seems somewhat exotic, many of the design goals would be considered mainstream today. What's more, some of the control concepts used to build these supplies bear surprising resemblances to those now being used in advanced dc-dc converters.

A Comparison of Tolerance Analysis Methods
We have seen many methods of calculating the worst case tolerance limits for electronic circuits. The intent of this paper is to demonstrate several different methods and determine the results and the corresponding confidence factors for each method.

Failure Mechanisms Of Power Systems...
Many challenges must be overcome when designing power systems for use in particle accelerator-based projects. To succeed, a detailed understanding of the environment, the potential component and functional failure modes, and the performance degradation of the components is mandatory. This paper presents some of these challenges and also recounts the success of such a power supply project.